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dc.contributor.authorJaracz, Kazimierzpl_PL
dc.contributor.authorVítečková, Milušepl_PL
dc.date.accessioned2020-05-20T19:21:04Z
dc.date.available2020-05-20T19:21:04Z
dc.date.issued2008
dc.identifier.citationAnnales Academiae Paedagogicae Cracoviensis. 52, Studia Technica 2 (2008), s. [73]-81pl_PL
dc.identifier.urihttp://hdl.handle.net/11716/7266
dc.description.abstractThe paper is devoted to a conventional controller design by the direct synthesis method. On the basis of synthesis equation for the first order plant plus time delay the computational formulas for controller adjustable parameters are derived.en_EN
dc.language.isoplpl_PL
dc.subjectdirect synthesisen_EN
dc.subjectPIDen_EN
dc.subjectPDen_EN
dc.subjecttime delayen_EN
dc.titleProjektowanie regulatorów konwencjonalnych metodą syntezy bezpośredniejpl_PL
dc.title.alternativeConventional controller design by direct synthesis methoden_EN
dc.typeArticlepl_PL


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